[aosd-announce] CFP - VMIL 2008: Virtual Machines and Intermediate Languages for emerging modularization mechanisms

Hridesh Rajan hridesh at cs.iastate.edu
Mon Nov 19 10:52:51 EST 2007


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Second international workshop on Virtual Machines and Intermediate 
Languages for emerging modularization mechanisms (VMIL 2008) - 
a one-day workshop affiliated with AOSD 2008. 

http://www.cs.iastate.edu/~design/vmil/

Submission URL: http://www.easychair.org/conferences/?conf=VMIL-08

Important Dates
Submission Deadline: Jan 11, 2008, 23:00 GMT
Notification of Acceptance: Feb 8, 2008
Final Versions of Papers Due: March 8, 2008
Workshop: March 31 or April 1, 2008

Program Committee

    * Eric Bodden (McGill University, Canada)
    * Shigeru Chiba (Tokyo Institute of Technology, Japan)
    * Sophia Drossopoulou (Imperial College, UK)
    * Eric Eide (University of Utah, USA)
    * Matthew Flatt (University of Utah, USA)
    * Gregor Kiczales (University of British Columbia, Canada)
    * Hidehiko Masuhara (University of Tokyo, Japan)
    * Angela Nicoara (ETH Zurich, Switzerland)
    * Harold Ossher (IBM Research, USA)
    * and the organizers

Organizers
    * Hridesh Rajan, (Iowa State University, USA)
    * Christoph Bockisch, (Darmstadt University of Technology)
    * Michael Haupt (Hasso Plattner Institute, University of Potsdam, Germany)
    * Robert Dyer (Iowa State University, USA)

Motivation and Objectives

VMIL is a forum for research in virtual machines and intermediate 
languages for emerging modularization mechanisms such as mix-ins, 
units, open classes, hyper-slices, adaptive methods, roles, 
composition filters, pointcut-advice, and intertype declarations. 
Recent research results have shown that deeper support for 
these modularization mechanisms, e.g., in virtual machines and 
intermediate languages, have far-reaching impacts. In particular, 
more optimization opportunities open up. Development processes 
such as incremental compilation, debugging, etc. are radically 
simplified. Moreover, dynamic support becomes possible without 
compromising efficiency. To that end, the objective of this workshop, 
second in the series, is to generate and broaden interest in 
this topic. We invite novel insights from within the programming 
language, compilers, virtual machine communities and elsewhere. 
Topics of interest include, but are not limited to: 
compilation-based and interpreter-based virtual machine as well 
as intermediate language designs with better support for these 
emerging modularization mechanisms, compilation techniques from 
high-level languages to enhanced intermediate languages, 
optimization strategies for reduction of runtime overhead due to 
either compilation or interpretation, improved techniques for fast 
evaluation of pointcuts and other predicates inside virtual machines, 
advanced caching and memory management schemes in support of the 
mechanisms. 

The areas of interest include, but are not limited to: 
compilation-based and interpreter-based virtual machine 
as well as intermediate language designs that better support these 
emerging modularization mechanisms, compilation techniques from 
high-level languages to enhanced intermediate languages, optimization
 strategies for reduction of runtime overhead due to either compilation 
or interpretation, improved techniques for fast evaluation of pointcuts 
and other predicates inside virtual machines, advanced caching and 
memory management schemes in support of the mechanisms. 

Paper Categories

In these key areas, we invite high-quality papers in the following two
categories.

* Research and experience papers: These submissions should describe work 
that advances the current state of the art in support of advanced separation 
of concerns techniques in virtual machines and intermediate languages. 
Experience papers that are of broader interest and describe insights 
gained from practical applications. The page limit for these submissions 
is 10 pages.

* Position papers: These submissions present and defend the author/s 
position on a topic related to the broader area of the workshop. 
The page limit for these submissions is 6 pages.

Review Process

The program committee will evaluate each paper based on its relevance,
significance, clarity and originality. Each submission will be reviewed 
by at least three PC members.

Paper Submission

Papers should be submitted in PDF format. The results described must be
unpublished and must not be under review for another workshop, conference 
or journal. Submissions must conform to ACM SIGPLAN format and must not 
exceed the page limit of the category in which it is classified by authors
(including all text, figures, references and appendices). Submissions which 
do not conform to this will be desk rejected without reviews.

Hridesh Rajan
Assistant Professor of Computer Science
Iowa State University
http://www.cs.iastate.edu/~hridesh




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